1. Field of Invention
The invention relates to a programmable integrated cell containing one or more of combinational logic cells, sequential logic cells and routing cells for use in a programmable architecture integrated circuit (IC).
2. Description of Related Art
Field programmable gate arrays (FPGAs) typically enable user programming of integrated circuits (ICs), but result in slower performance (clock speed) because of the delays through the transistors, switches or multiplexers used to program the interconnects between configurable logic elements. Each logic element can be connected to a multitude of other logic elements through switches, in which the path from one programmable logic element to the next may be strewn with many switches, slowing down circuit operation. Some paths in a programmable IC, however, are not as critical as others. Therefore, a customized programmable IC can be designed where speed in the critical paths are optimized over other non-critical paths.
Routing elements have increasingly been added to programmable logic devices/ICs such that routing elements now typically occupy a much larger area than configurable logic elements themselves. Compounding to the problem is the fact that routing delays are typically much greater than logic delays, resulting in a slow operating clock frequency. In a conventional implementation, a large fraction of the routing elements may be redundant.
Accordingly, it is desirable to have a programmable architecture that provides a greater flexibility of logic and routing elements in an FPGA chip.